manolas
/
vcglib
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
vcglib/apps/sample/trimesh_intersection_plane/trimesh_intersection_plane.pro

4 lines
101 B
Prolog
Raw Normal View History

Yet another big cleaning pass to the samples
2012-10-09 10:43:35 +02:00
include(../common.pri)
Totally rewrote the plane intersection sample
2017-04-05 07:48:20 +02:00
TARGET = trimesh_intersection_plane
SOURCES += trimesh_intersection_plane.cpp